National Aeronautics and Space Administration

Glenn Research Center

Contents

This content page displays the STRS waveform applications, components, and operating environments (OEs) available in the STRS Application Repository.

The CSV file has the same information as below to aid a requester in deciding whether the application is appropriate. The CSV file may be opened in Excel for further processing. You can view the CSV file at: STRSApplicationRepositoryPublicMetadata.csv.

To request one of the STRS applications, components, or OEs, see Application Request. Note that an Application Request may be initiated with some data filled in by clicking on the link in the "Request" column.

Also, you can display a subset of columns at the bottom of the page by checking to indicate the columns you want to display and then clicking on the "Print Selected Columns" button. A separate window will appear with the information you selected.

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All Info by Row Submittal Number Identification Name Request Type Usage Functional Description Target Platform Version Deployment Date Release Category Capability Space / Ground Software Classification A-H Safety Critical Architecture / Version Release Restrictions Release Availability Availability of Models TRL TRL Justification RRL RRL Justification RRL (Documentation) RRL (Extensibility) RRL (Intellectual Property Issues) RRL (Modularity) RRL (Packaging) RRL (Portability) RRL (Standards Compliance) RRL (Support) RRL (Verification & Testing)
STRS-SUB-000001 LEW-18562-1 STRS Compliance Tools STRS-SUB-000001: STRS Compliance Tools script,WF Software and UNIX Bourne shell scripts are used to help verify STRS compliance.
The UNIX Bourne shell scripts are used to help verify software compliance to the NASA-developed Space Telecommunications Radio System (STRS) architecture. The goal of STRS is to support waveform application portability, upgradability, and reduce the cost and risk of using Software Defined Radios for NASA. ComplianceTool.sh is a Bourne shell script that tests an STRS application for the appropriate method signatures and tests the STRS infrastructure for the required named constants, typedefs, and structs. The command and compliance application, WFCCN, is ported, compiled, and linked with an STRS infrastructure to verify static compliance such that all required STRS infrastructure-provided methods are implemented as well as the named constants, typedefs, and structs. WFCCN may also be executed for dynamic compliance testing. The tools are described in "STRS Compliance Testing", NASA/TM 2011-217266.
UNIX: Linux, CYGWIN, MAC OSX 06/28/2012 2012-06-28 US Test Ground E No STRS v1.02 None Yes No 2 Never will be used in production environment. Used as a tool for analysis of OE application(s). 6.89 Tested against multiple OEs. 5 7 8 7 5 7 8 8 7
STRS-SUB-000002 LEW-18976-1 STRS GRC GSFC TDRSS (GGT) Waveform STRS-SUB-000002: STRS GRC GSFC TDRSS (GGT) Waveform WF BPSK spread-spectrum waveform to enable standard TDRSS functionality.
The GRC GSFC TDRSS (GGT) Waveform is a Binary-Phase-Shift-Keying (BPSK) spread-spectrum waveform that uses BPSK and SS-BPSK modulation to enable standard TDRSS functionality. The Spread Spectrum BPSk modes operate over the TDRSS Single Access and Multiple Access services at data rates of 18kbps forward and 24kbps return, with options possible for encoding/decoding and scrambling. The BPSK modulation modes operate at 155kbps and 769kbps forward, and 192kbps and 769kbps return, respectively. Similar options are available for encoding/decoding and scrambling. The waveform supports a SpaceWire data interface to the flight computer and provides a standard 1553 command and telemetry interface.
JPL CoNNeCT S-band SDR, 32-bit RISC SPARC GPP (ATMEL AT697E Microcontroller), RTEMS OS, 2 Xilinx Virtex II FPGAs. 1.1.3 2012-07-20 GPR/Interagency Tx+Rx Space E No STRS v1.02 ITAR Yes Yes 7 This is the baseline waveform software for an experimental SDR on-board the International Space Station. 5.22
The software was developed per NASA Class E+ standards as well as the STRS 1.02 standard. Software was used for the NASA SCaN Testbed system integration verification testing, as well as on-orbit checkout.
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STRS-SUB-000003 LEW-19286-1 STRS Harris SDR Capture Test Waveform STRS-SUB-000003: STRS Harris SDR Capture Test Waveform WF Captures raw Ka-band data to FPGA's Block RAM for further transfer.
The Test Capture Waveform is a relatively simple application intended to serve a generic experimenters need for Ka-band receive signal snapshots. Captures of the raw data can then be processed or downloaded for custom analysis off-line. It is a receive-only waveform and does not engage any of the transmitter sections of the Harris SDR. Fundamentally, the waveform works by the using the Block RAM (BRAM) that's inherent on each of the FPGAs on the Signal Processing Module as temporary storage space for ADC samples. Once a capture has been initiated, the waveform stores data until each of the BRAM are filled to the specified capture size. Next, each FPGA, which contains a SpaceWire transceiver core, transfers its contents to Avionics via the SpaceWire Data link. Once the capture and system configuration data from each FPGA has been written to Avionics flash memory, the resulting file can be downlinked to the ground for post-processing.
Harris CoNNeCT Ka-band SDR, AiTech S950 3U cPCI radiation tolerant Power PC 750, VxWorks OS, 4 Xilinx Virtex IV FPGAs. 1.1.2 2014-01-24 GPR Rx Space E No STRS v1.02 Agreement Yes No 7
Operations of this Test Waveform application were conducted on-orbitwith the flight SCaN Testbed Harris SDR. Ka-band RF signals were captured, and wideband sun tracking captures were also performed.
4.78
The waveform application was designed with portability in mind eventhough the functionality is very closely tied to the hardware, i.e. ADC. The Antenna Pointing Quality Metric (APQM) function was specifically separated as much as possible, being more likely reused in a majority of receive waveforms.
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STRS-SUB-000004 NPO-49098 STRS Short Blocklength LDPC Codes for Software Defined Radios STRS-SUB-000004: STRS Short Blocklength LDPC Codes for Software Defined Radios component LDPC
Low-Density Parity-Check (LDPC) codes provides error correction coding functions for a Software Defined Radio (SDR), optimized particularly for low data-rate telecommunications. The software consists primarily of encoders and decoders for a family of three shortblocklength rate-1/2 Low-Density Parity-Check (LDPC) codes. The codes have sizes (n=128,k=64), (n=256,k=128), and (n=512,k=256), and are designed for transferring small amounts of data at low speed over power-constrained links. They have been presented to the Consultative Committee for Space Data Systems (CCSDS) for consideration as a Telecommand standard. The software includes protocol functions to construct CCSDS-standard Communications Link Transmission Units (CLTUs) at the transmitter, and to parse them at the receiver. For test and demonstration purposes, the software also includes a CLTU data source, and an Additive White Gaussian Noise (AWGN) channel simulator.
Xilinx Virtex II FPGA 2015-04-02 GPR Tx+Rx Space E No STRS v1.02 Agreement Yes No 3
The software has been tested, and performance results have been published in the open literature, including [3]. Testing has not been extensive, so while it is unlikely that there are any significant flaws in the algorithms, it is possible that bugs remain.
4.22
Software Usage Agreement has been completed but data rights information is not embedded in the code. Limited installation instructions. Because this is a single odule, not a full waveform capability, STRS APIs are not used which may increase effort to port to an STRS platform. Compliant with relevant CCSDS standards and interfaces are well defined, per the STRS architecture standard.
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STRS-SUB-000005 NPO 49099 STRS General Purpose LDPC Codes STRS-SUB-000005: STRS General Purpose LDPC Codes component CCSDS Blue Book AR4JA LDPC
The encoder consists of three components as described in the CCSDS "TM Synchronization and Channel Coding" Blue Book, 131.0-B-2. The first performs LDPC encoding with the CCSDS-standard (n = 2048; k = 1024) "AR4JA" LDPC code. The second is an optional pseudo-randomizer. The third prepends Attached Synchronization Markers (ASMs) to the codewords to produce telemetry transfer frames. LDPC codes are decoded iteratively, and each iteration consists of two halves. In the first half of each iteration, the decoder updates its internal probabilities for each code symbol based upon correction terms computed in the previous iteration and from the received symbols. It also generates tentative binary decisions for each code symbol. In the second half of each iteration, the decoder uses the code's constraint equations to check its results and to compute the next set of corrections. If/ every constraint equation is satisfied at the end of an iteration, then a codeword was found in the first half of that iteration. If any constraints remain unsatisfied, then the decoder begins another iteration.
Xilinx Virtex II FPGA 2014-11-21 GPR Tx+Rx Space E No STRS v1.02 Agreement Yes No 1
No information about its heritage within a mission. The software has been tested, and performance results have been published. Testing has not been extensive, so while it is unlikely that there are any significant flaws in the algorithms, it is possible that bugs remain.
2.78
Software Usage Agreement has been completed but data rights information is not embedded in the code. Limited installation instructions. Because this is a single module, not a full waveform capability, STRS APIs are not used which may increase effort to port to an STRS platform. Compliant with relevant CCSDS standards and interfaces are well defined, per the STRS architecture standard.
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STRS-SUB-000006 LEW-19307 STRS Reconfigurable Bandwidth-Efficient Transmit Waveform for High-Rate Telemetry STRS-SUB-000006: STRS Reconfigurable Bandwidth-Efficient Transmit Waveform for High-Rate Telemetry WF Multiple Tx
The Reconfigurable Bandwidth-Efficient Transmit Waveform for High-rate Telemetry supports continuously tunable data-rates up-to 800 Mbps, and a modulated symbol rate up-to 200 MSymbols/second. The supported modulations include GMSK, BPSK, QPSK, OQPSK, 8-PSK, 16-APSK, 16-PSK, and 16-QAM. Various pulse-shape filtering options are available, using Root-Raised Cosine and Raised Cosine filters, with excess bandwidths between 0.1 and 1.0. The support forward error correction codes include Low Density Parity Check (LDPC) codes, specifically the AR4JA and C2 families of codes. From the AR4JA family, the waveform supports rates 1/2, 2/3, and 4/5. From the C2 family of codes, the waveform supports the rate 7/8 code. Additional data processing includes Consultative Committee for Space Data Systems (CCSDS) - compliant randomization (131.0-B-2) and Advanced Orbiting Systems (AOS) data framing (732.0-B-2). In any communication system, there are linear and non-linear channel impairments which limit the performance. This waveform includes a digital pre-distortion module, which is designed to invert the non-linear distortions of a power amplifier, such as a Traveling Wave Tube Amplifier (TWTA). A re-programmable finite-impulse response (FIR) filter is also included to pre-compensate for linear channel impairments. Finally, the waveform includes several in-situ channel characterization capabilities, such as a continuous wave (CW) tone generator, two-tone generator, and the ability to sweep the center frequency across the SDR's tunable range. A programmable digital drive level allows the output power of the waveform to be varied continuously.
Harris CoNNeCT Ka-band SDR, AiTech S950 3U cPCI radiation tolerant Power PC 750, VxWorks OS, 4 Xilinx Virtex IV FPGAs. 2.3.0 2014-06-16 GPR Tx Space E No STRS v1.02 None Yes Yes 7
The waveform has been tested during flight Operations with SCaN Testbed and NASA's Space Network, and has been demonstrated to be compatible with commercially available high-rate receivers.
6.11
Overall, the waveform source code is moderately re-usable. The waveform components are modular and were written with portability in mind, to the extent that is feasible with VHDL and FPGA-based signal processing. The waveform can easily be ported to other FPGA families made by the same vendor, provided the device has sufficient resources. This has already been demonstrated. Moderate effort would be required to port the waveform to other FPGA vendors or an ASIC, and would require modifying the code to use the target device primitives (FIFOs, dedicated multipliers, etc).
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STRS-SUB-000007 LEW-19083-1 GRC's STRS Reference Implementation STRS-SUB-000007: GRC's STRS Reference Implementation OE GRC's STRS Reference Implementation/OE
The STRS reference implementation is a demonstration of the STRS architecture. The STRS Architecture Standard for software-defined radios (SDRs) is an open architecture for NASA space and ground radios. The STRS standard provides a common, consistent framework to develop, qualify, operate and maintain complex reconfigurable and reprogrammable radio systems.
VxWorks, Linux GPR OE Ground E No STRS v1.02 None Yes Yes 4 GRC's STRS reference implementation has been tested in a lab environment with some validation in a relevant environment for White Sands Ground Station and iPAS. 4.78 GRC's STRS reference implementation was developed and tested in a lab environment, but then adapted for other projects. 5 3 8 5 2 4 4 7 5
STRS-SUB-000008 NPO47766 & NPO48029 STRS JPL OE + Test Waveform STRS-SUB-000008: STRS JPL OE + Test Waveform OE JPL's SDR/OE
The JPL STRS OE is a flight qualified STRS Architecture Standard compliant Implementation of a software defined radio Operating Environment targeting the JPLSDR radio produced for the CoNNeCT project. It provides a standardized abstracted interface to platform resources such as data converters, file system, etc. which can be used by STRS standards conformant waveform applications.
JPL CoNNeCT S-band SDR, 32-bit RISC SPARC GPP (ATMEL AT697E Microcontroller), RTEMS OS, 2 Xilinx Virtex II FPGAs. 2010-01-01 GPR OE & Test Space C No STRS v1.02 Agreement Yes Yes 9 flying on STB 5 Currently being used in operational context by multiple groups 9 9 8 7 7 5 7 9 9
STRS-SUB-000009 LEW-19389-1 The Integrated Power, Avionics, and Software (iPAS) STRS Radio field programmable gate array (FPGA) Wrapper and Test Waveform STRS-SUB-000009: The Integrated Power, Avionics, and Software (iPAS) STRS Radio field programmable gate array (FPGA) Wrapper and Test Waveform WF Test WF
The purpose of the FPGA design is the implementation of the signal processing functions of the STRS radio architecture in the IPAS RAICs platform. The FPGA design will consist of two parts the FPGA wrapper and the test waveform. The FPGA wrapper implements each platform interface: 1. Ethernet communication to the embedded processor for commanding and data streaming, 2. Digital-to Analog Converter (DAC) and Analog-to-digital converter (ADC) interface to the RF board, 3. RF Board Control and Configuration, 4. FPGA Clocking. The test waveform does not fully implement all the signal processing functionality for a radio, but it exercises and demonstrates each interface in the FPGA wrapper. A future user of the platform for an STRS radio, would use the FPGA wrapper and replace the test waveform with their own radio signal processing functions. The FPGA design receives and processes commands and provides command control and data to the test waveform. I t also receives and transmits streaming data from/to the embedded processor. The test waveform demonstrates each FPGA wrapper interface. To test transmit-side streaming, it can perform bit error rate testing on transmit-side PRBS streaming data. It can also generate PRBS streaming data packets for a receive-side streaming data source. The test waveform generates sine waves for the in-phase (I) and quadrature (Q) inputs to the RF transceiver. A BPSK modulator is included to modulate PRBS data from with the PRBS generator or from transmit-side streaming data. Captured I and Q samples from the RF transceiver can be streamed to the embedded processor where it can be plotted (if a sine wave) or bit error rate checked (if PRBS data) to demonstrate proper functionality of the RF board and its interfaces.
ML650 Virtex-6 FPGA board, Analog Devices FMCOMMS1-EBZ RF transceiver board 2016-01-15 GPR Tx + Rx, Ground No None Agreement Yes No 4 The iPAS STRS Radio was implemented on a commercially available FPGA development board and was tested and demonstrated in a laboratory environment. 4.67
The iPAS STRS Radio VHDL code was written with intention that the code would be reused by waveform developers. Documentation, like the Waveform Developer's Guide and PLD Design Description Document, will make reuse much easier.
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STRS-SUB-000010 LEW-19478-1 DVB-S2 Compatible Transmitter with BPSK Receiver for Adaptive Communication System STRS-SUB-000010: DVB-S2 Compatible Transmitter with BPSK Receiver for Adaptive Communication System WF Dynamically adjustable communication link
This waveform utilizes the commercial Digital Video Broadcasting Satellite - Second Generation (DVB-S2) standard to provide a suite of modulation and encoding schemes, which allows the communication link to be dynamically adjusted to optimize performance. The waveform is a transceiver, and uses DVB-S2 for the transmit waveform, and a BPSK receiver for the feedback path. The Space Data Link Protocol (Consultative Committee for Space Data Systems (CCSDS) standard) is used for both transmit and receive data framing. The waveform also includes the ability to automatically compensate for non-linear channel impairments to improve the performance of high-order modulations.
JPL CoNNeCT S-band SDR, 32-bit RISC SPARC GPP (ATMEL AT697E Microcontroller), RTEMS OS, 2 Xilinx Virtex II FPGAs. SVN Revision 3768 2016-09-09 US Tx + Rx Space E No STRS NASA-STD-4009 None TBD Yes 7
The waveform has been tested during flight operations with the Space Communication and Navigation (SCaN) Testbed on the International Space Station, through direct to ground links and through NASAs Space Network. The waveform has been demonstrated to be compatible with commercially available DVB-S2 receivers.
6.00
Overall, the waveform source code is moderately re-usable. The waveform components are modular and were written with portability in mind, to the extent that is feasible with VHDL and FPGA-based signal processing. The waveform can easily be ported to other FPGA families made by the same vendor, provided the device has sufficient resources. This has already been demonstrated. Moderate effort would be required to port the waveform to other FPGA vendors or an ASIC, and would require modifying the code to use the target device primitives (FIFOs, dedicated multipliers, etc).
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STRS-SUB-000011 LEW-19643-1 STRS Flight Computer Interface (FCI) app for Core Flight System STRS-SUB-000011: STRS Flight Computer Interface (FCI) app for Core Flight System application A Core Flight System (cFS) application that provides STRS OE functions on cFS
This is a cFS application that can provide the various STRS defined services using the common flight software framework known as Core Flight System (cFS). This is a cFS application that can be combined with the portable STRS OE framework library, which is available separately from the STRS repository, to provide a complete STRS Operating Environment within a Core Flight Software instance. Note this application does not implement the core STRS API; it relies on the STRS OE Framework to provide this, which can be built and loaded as a cFS library prior to loading this cFS application. This application provides the following STRS Services: - Logging (e.g. STRS_ERROR_QUEUE, STRS_WARNING_QUEUE etc) using CFE event services - MET Time using CFE time services - File and Queue implementations using OSAL - Bridge to the CFE software bus (SB) for command and telemetry.
Core Flight System (cFS) on any supported machine 1.0 2017-03-31 TBD OE Both E No None None Yes No 5 This module has been tested in parallel with the STRS OE Framework on the Vadatech AMC516 SDR platform, running the latest development version of cFS. 5.56
This software is specific to the core flight system (cFS) and adapts the fully generic STRS OE Framework to operate in this context to create a complete OE. By nature, this is a software module that is specific to this particular system. It is distributed separately from the fully portable/generic STRS OE framework library to increase the re-usability of that framwork.
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STRS-SUB-000012 LEW-19644-1 Portable C/C++ STRS Operating Environment Library STRS-SUB-000012: Portable C/C++ STRS Operating Environment Library OE A C/C++ library which implements the core GPP STRS API in a reusable fashion.
This is a C library which may be used as a central component of an STRS Operating Environment (OE). This portable library contains a reference implementation of the core STRS API and call dispatcher functions. However, it is not an OE by itself as it does not contain implementation modules to provide the services such as Time and Logging. Such services must be supplied by a supplemental library or code module in order to create a complete Operating Environment. The base library is adheres to ISO/IEC 9899:1999 (C99) and should compile and run on any C99-compliant system. Also included are C++ extensions which allow interfacing with waveforms implemented in the C++ language. The C++ extensions adhere to ISO/IEC 14882:2011 (C++11) and these can be disabled on platforms that do not have sufficient C++ language support.
GPP - Portable to various general purpose processors 1.0 2017-03-31 TBD OE Both E No STRS NASA-STD-4009A None Yes No 5
This operating environment has been tested using the AMC516 SDR hardware supplied by Vadatech and various additional waveforms such as receive sample captures and transmitter functions. In addition to laboratory tests, this includes experiments involving observation of real-world events on the ISS where the operation of the platform was confirmed alongside existing observation equipment.
6.44
This library is implemented to be compliant with relevant ISO C/C++ standards and is not tied to any particular hardware architecture. It has been deployed on a relevant SDR platform and verified in several contexts, although no flight qualifications have been done to date.
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STRS-SUB-000013 NTR50371 Packet Manager CCSDS Protocol Adapter STRS-SUB-000013: Packet Manager CCSDS Protocol Adapter Service Packetize data flowing to and from different waveforms
The Packet Manager (PktMgr) waveform service provides a data flow interface for packetizing data read from a data source and written to a data sink. It can be integrated into an STRS waveform application to produce a managed flow of data for connecting various data producers (data sources) with data consumers (data sinks). Each instance of PktMgr data is unidirectional, meaning data flows in one direction from a data “source” to a data “sink”. Two instances of Pktmgr can be instantiated to support bidirectional data flow between two waveforms.
GPP 1.0 TBD Both E No STRS v1.02 None Yes 4 The software was used to integrate and test waveform source and sink components The software includes unit tests to demonstrate capabilities. 5 4 1 2 2 2 4 2 4
STRS-SUB-000014 LEW-19723-1 Modular and Portable QPSK Transceiver Waveform STRS-SUB-000014: Modular and Portable QPSK Transceiver Waveform Application QPSK transceiver waveform on a low-cost, commercially-available platform
A QPSK transceiver waveform has been developed and implemented on a commercially-available ground-based software defined radio platform. The waveform utilizes legacy NASA forward error correction codes and consultative Committee for Space Data Systems (CCSDS) data framing standards. It's controlled via web interface, nd allows the user to multiplex between test (pseudo-random) and network-sourced data. From a specification standpoint, the waveform supports the following functionalities in both transmit/receive directions: QPSK modulation, continuously tunable data-rates up-to 6.144Mbps for RX and 24.576Mbps for TX, convolutional coding/decoding (rate 1/2, constraint length of 7), CCSDS-compliant randomization (131.0-B-2) and Advanced Orbiting Systems (AOS) data framing (732.0-B-2). The product consists of two main components: (1) the digital logic (VHDL) implementation for the Field Programmable Gate Array (FPGA) that does the required signal processing functionalities and (2) the command-and-control software portion that leverages the open-source Core Flight Executive (cFE) software suite and provides a graphical user interface to the waveform. Functional-based capabilities: Gray-coded QPSK, 1:1 power ratio, I/Q alternating symbols Continuously-tunable symbol rates using Farrow-based filter structures: Up to 24.576 Mbaud on TX, Up to 6.144 Mbaud on RX Data framing using AOS Space Data Link Protocol (defined in CCSDS 732.0-B-3) 2048 bit AOS frames + 32-bit Attached Synchronization Marked (0x1ACFFC1D) Data is randomized to ensure sucient bit transition density Convolutional Encoding: r = 1/2, k = 7(defined in CCSDS 131.0-B-2) Differential encoding (NRZ-M)to remove ambiguity resolution at receiver Mux between internally- generated PRBS-23 and externally-sourced ethernet data STRS compliance, emphasis on code inference and minimal IP usage Built under Core Flight Executive (cFE) version 6.6.0 Performance-based Capabilities
FPGA: Xilinx ML605 Evaluation Board + Analog Devices FMCOMMS1 RF Board PC: Axiomtek eBOX620-1`10-FL Embedded System 2017-10-18 US Both E No STRS v1.02 None Yes Yes 6
The end-to-end system has undergone bit-error rate testing, and performs ,well compared to the theoretical performance curve. This waveform has been vigorously tested in a lab ,environment, and the results are contained within the Performance Characterization Report. ,Additionally, the waveform was demonstrated to Johnson Space Center's Avionics and Software (under ,AES) project within their relevant end-to-end environment.
5.67
This waveform was developed with modularization and portability in mind ,from the FPGA perspective. It's designed to build with the default logic synthesizer (Xilinx's XST), uses ,minimal vendor-specific IP, and consists of many inter-connected (and independently usable) VHDL ,modules. Additionally, from the software perspective, the cFE application was compiled and ran on a HP ,Z400 with dual NICs, and the application run successfully.
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